Cores not listed in the FAQ you would like to see on Next

Time to talk about what other machines can run on the Next hardware!
syd1138
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Re: Cores not listed in the FAQ you would like to see on Next

Post by syd1138 » Wed May 31, 2017 5:45 pm

What's the limit here, I can see the NES and SMS listed, is it possible to go one generation on for the Megadrive and SNES or is that a step too far for the hardware?

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lgb
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Re: Cores not listed in the FAQ you would like to see on Next

Post by lgb » Wed May 31, 2017 11:12 pm

Laxer3A wrote:
Tue May 30, 2017 9:29 pm
lgb : I start to like the Entreprise a lot by the way you describe the hardware :-)

I think it should not be a problem : the original chipset had to have a FIXED clock somewhere (dynamic pixel clocking seems too generous for a computer of that age).
Generating video signal based on dynamic condition (Hsync, VSync etc...) should not be a problem. (I am myself a graphic chip with such programmable registers)
Enterprise is a Z80 based beauty I love a lot, actually. :) It's very neat design, eg it has 4Mbyte (by default) uniform memory access scheme, allowing any of the 256 of 16K pages to be mapped to any of the 4*16K of the Z80 address space. Every RAM and ROM in the system is simple somewhere in the 4Mbyte range. On boot, Enterprise checks for ROMs in the system searching for special ROM signatures, and chains them automatically, it even allows to define custom video/keyboard driver, and also file system like drivers (even RAMDISK, disk based OS extension, the EXDOS, etc), without even modify the original OS ROM (EXOS). But you can load any system extension into RAM too later. It's kinda advanced, no wonder, programmers cannot understand in its time, trying to follow the "old habits" to have video RAM by default on a given fixed address etc, and then wondering that their programs fails on another EP128, since everything is dynamic, even system segment usage by the OS, including the default video RAM position ... Surely, what should they know to use EXOS (OS) functions to query information rather then blindly thing there are fixed address for everything unlike other 8 bit machines. It's even possible that RAM memory is at different physical addresses somewhere in the 4Mbyte range. This also means, that without any "trick" you can have almost 4MByte memory on Enterprise (minus the ROM sizes ...) which is fully usable by the default OS, since it was designed to handle all the possibilities, even when the default Enterprise-128 config used only 128K RAM (and only 64K for the Enterprise-64).

But to have some Spectrum topic as well :) Enterprise's custom video chip (Nick) reads a structure called LPB (line parameter block) a 16 bytes long entry from LPT (Line Parameter Table) in the memory. It can describe even every scanline if you want, so you can have any video memory layout, even different video and colour modes etc by hardware, without any need of C64-line technique (ie, raster interrupt and modify VIC-II registers etc). So Enterprise can emulate Spectrum's video memory layout as well. With the flexible memory paging, it's also possible to mimic a Spectrum like memory map, without any problem. Many Spectrum games were converted to Enterprise to set-up a Spectrum like environment like this first. However the first problem that Enterprise for sure doesn't have the ULA port ... The second one: though Nick has attribute video mode similar to Speccy (I mean as well, it has more modes) the layout is different (4 bits foreground 4 bits background palette index to the 256 colour system palette). In fact, there was a hardware add-on stating "ZX Spectrum emulator". It simply converted attribute bytes, and "catches" the I/O to the ULA port by generating an NMI, when actually Z80 code handled the I/O request instead of the hardware :-) Surely, you can't expect any Speccy-like correct timing, far from it :-O But it should work with software does not depend on too much strict timing at least ....

But speaking about the timing (not Speccy's or Speccy emu's ... but Enteprise's): for Nick, LPT defines the time of VSYNC. That is, it sometimes varies what the VSYNC frequency is used even software by software. Some software used this to create interlaced screen. The other thing: Nick has priority to access the video RAM (VRAM) and it stretches the clock of Z80 not to collide. But unlike on Spectrum, it's not a fixed T-state, but it varies on the exact ratio of Nick's pixel clock and CPU clock, etc etc. But this also allows to simply put machine on turbo speed with just some crystal change and that's all, almost (since Nick does not have a requirement to have a well defined "pattern" and frequency of CPU's access to the VRAM, etc). It was even succeeded to increase Z80 clock to 10-12MHz instead of 4MHz (which was the Enterprise's default CPU clock for Z80). Though at this point, RAM need to be replaced in EP because not fast enough, but strangely, Nick seem to work even with this "unreal" speed and the machine seems to remain stable and usable (@10MHz, on @12, there were already problems ...). Surely, Nick has some fixed timing as its own for a line at least, but it's really hard to predict how CPU is affected (not as simply as with Speccy, not even constant). But for the VSYNC, so the length of the frame, it's kinda depends on the actual LPT told to Nick to use ... So you can't say it's 50Hz, or anything, can be changed to any value almost (though surely, if you go too far from each direction a TV would not follow it any more to display a sane image ...). What I meant for FPGA adoption, that for generating VGA signal, you may need to tell to have fixed 50Hz or something, but you can't do this with Enterprise too much, since it depends on the programmer and their LPT ...

Sorry for the long text, hopefully I was not too boring here ...

padnoter
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Re: Cores not listed in the FAQ you would like to see on Next

Post by padnoter » Wed May 31, 2017 11:24 pm

I'd vote for (if possible);
Sinclair QL
Cambridge Z88
Dragon 32
BBC Model B
Oric 1
Oric Atmos
Enterprise 128/Elan
Atari ST (??)

Laxer3A
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Re: Cores not listed in the FAQ you would like to see on Next

Post by Laxer3A » Wed May 31, 2017 11:59 pm

@lgb
No no not all ! A very interesting read. I am surprised by this kind of architecture because given the clock available at this time, the available transistor count in the silicon node process... I would not be surprised that the graphic logic is the same size or bigger than of an Amiga graphiic chip !!!
Seems to me that the graphic chip is definitely bigger than the CPU :-)
Concerning the flexibility of the OS, I am not really surprised, Amiga had plug and play too, some part of the OS were really well thought, even with limited hardware. You can feel the engineer definitely a pride in making something superior to the state of the art in micro computing !

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lgb
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Re: Cores not listed in the FAQ you would like to see on Next

Post by lgb » Thu Jun 01, 2017 1:14 am

@Laxer3A: The key secret of Enterprise's ability to boost CPU speed, that VRAM is "behind" Nick, ie private access to Nick. If CPU wants to access VRAM, it must "through" the Nick, and it has a "simple" clock stretching login on CPU's clock to avoid collision, with sampling CPU's clock. Thus, you can increase CPU clock without bothering Nick too much, to a level for sure, when CPU clock signal is simply too high that the stretching logic can follow. Non-VRAM RAM in EP is accessed directly the CPU, so there it's only the speed of that DRAM matters if it can handle. Well, more or less :-D However I'm "afraid" Nick is not a too much complex device you may think. Actually the idea is kinda simple, for a given scanline it divides the about 64usec time to 57 "slots". In every slots, Nick can read two bytes. The first 8 slots are simply used to read the current LPB (so 16 bytes), the last three (if I remember ...) is used for VRAM refresh generation, the rest is available for current video display. The only difference between "usual" video chips and Nick, that "usual" ones has fixed video and colour mode configured on an I/O port or so for the video chip, while Nick always use the read LPB for that scanline, that's all. But it makes possible to select video ram address, video and colour mode etc per scanline, no "global" video mode, colour mode, video memory address, palette, all of these are set in LPBs within the LPT read by Nick real-time (so it's even possible to display the same content multiple times within a frame etc, or mirrored vertically, you can imagine, it's just simply to set display address in each LPBs in a way to get that). But besides this, Nick does not have too much other capabilities sadly, eg no sprites or similar notions. Amiga is really nice, but a bit different topic as far as I can feel, it's a "different world" (but indeed, "sexy" :) ).

Lawndart
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Re: Cores not listed in the FAQ you would like to see on Next

Post by Lawndart » Thu Jun 01, 2017 5:17 am

I'd like to see a msx2 core, and a c64 core with a halfway passable 1541 disk drive core. I'd be super happy if the major pal games that we missed in nstc ran on the c64 core.

JoeZX
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Re: Cores not listed in the FAQ you would like to see on Next

Post by JoeZX » Thu Jun 01, 2017 6:13 am

syd1138 wrote:
Wed May 31, 2017 5:45 pm
What's the limit here, I can see the NES and SMS listed, is it possible to go one generation on for the Megadrive and SNES or is that a step too far for the hardware?

http://pgate1.at-ninja.jp/SNES_on_FPGA/rpt_DE2-115.htm
Even light SNES FPGA implementation needs about 29 000 LE .. twice more than a whole SpecNext FPGA.

syd1138
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Re: Cores not listed in the FAQ you would like to see on Next

Post by syd1138 » Thu Jun 01, 2017 5:26 pm

JoeZX wrote:
Thu Jun 01, 2017 6:13 am
syd1138 wrote:
Wed May 31, 2017 5:45 pm
What's the limit here, I can see the NES and SMS listed, is it possible to go one generation on for the Megadrive and SNES or is that a step too far for the hardware?

http://pgate1.at-ninja.jp/SNES_on_FPGA/rpt_DE2-115.htm
Even light SNES FPGA implementation needs about 29 000 LE .. twice more than a whole SpecNext FPGA.
A big no then, thanks JoeZX

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w4jbm
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Re: Cores not listed in the FAQ you would like to see on Next

Post by w4jbm » Thu Jun 01, 2017 8:33 pm

Anyone for the UK101?

I'm working with a Cyclone II FPGA and Grant Searle's UK101 build. My first machine was an Ohio Scientific C1P and I'm kind of hoping to clone it and maybe the C4P MF. (First step is go get the composite video from Grant's build to NTSC.)

The 6502 is my favorite CPU to tinker with. The Z80 is the other I have a fair amount of experience with (building real-time data acquisition systems years ago) and the 6809 is the one I'd like to learn more about. Actually I can run any of the three on the Cyclone II, but not a lot of I/O options for any of them at this point.

Thanks,
Jim

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Zzapmort
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Re: Cores not listed in the FAQ you would like to see on Next

Post by Zzapmort » Thu Jun 01, 2017 10:25 pm

:o For a few not mentioned...
Consoles

Would a Vectrex be possible, ???

Computers

Camputer Lynx
Memotech mtx512
Einstein (would be great as mine is dying)
Coco
Dragon32
Amstrad PCW
Commodore 128

Spectrum addons

Opus disk drive emulation
Shadow of the Unicorn Add on
Fuller Sound Addon


Thats a lot of leftfield to ponder :mrgreen:

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