You can put layer 2 into any mmu slot(s) you want. Layer 2 is read from regular memory with one caveat - it must be completely contained in the first 512k chip which means layer 2 must be confined to banks 0-15. The location of layer 2 is controlled by nextreg 0x12:
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(R/W) 0x12 (18) => Layer 2 RAM page
bits 7-6 = Reserved, must be 0
bits 5-0 = SRAM page (point to page 8 after a Reset)
It's unfortunate that the documentation is calling this a "page" as it is actually a 16k bank that is written here. The nomenclature is "bank" for 16k banks as on the 128k spectrum and "page" for 8k pages.
If you're running in cooperation with NextOS, you can read the location of layer 2 from nextreg 0x12 but it is highly likely to be sitting in bank 9 which is where NextOS initializes its location. So layer 2 normally occupies banks 9,10,11 or pages 18-23. You can make that memory available in the z80's address space however you like. For example, if you want layer 2 completely visible in the bottom 48k:
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nextreg 0x50,18 ; mmu0 18
nextreg 0x51,19 ; mmu1 19
nextreg 0x52,20 ; mmu2 20
nextreg 0x53,21 ; mmu3 21
nextreg 0x54,22 ; mmu4 22
nextreg 0x55,23 ; mmu5 23
In addition to this, port 0x123b allows one third of layer 2 to be mapped to the bottom 16k write-only so that it can co-exist with the 16k rom. But layer 2 is not readable with this method so whether you can use this or not depends on what you are doing.
As Tim pointed out, reading nextreg state is a two step process. The selected register is written to port 0x243b and data is read/written to the nextreg via port 0x253b. The contents of port 0x243b is part of the state of the program so, as in Tim's example, your isr must read port 0x243b at its start and restore its setting on exit if the isr makes any changes to port 0x243b. This is not a problem for writing to nextregs because writing to a nextreg can be done atomically without altering port 0x243b using the special instruction "nextreg".