SYSTEM/NEXT V.1.03 – CORE 2.00.28 + ALPHA CORE V.3.00, FIRMWARE 1.15B, NEXTZXOS 2.01E!

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SYSTEM/NEXT V.1.03 – CORE 2.00.28 + ALPHA CORE V.3.00, FIRMWARE 1.15B, NEXTZXOS 2.01E!

Post by emook » Mon Sep 02, 2019 9:36 pm

Flashing and using the experimental/alpha 3.00 Core
It is better that you use the AntiBrick (AB) mode to flash this core (see instructions above).

Core v.3.00 features (not an exhaustive list)

no slow downs

  • Pixel scrollable in the x and y directions
    the 128k second display file no longer causes slow down and is compatible with layer 2
    A known alternative ULA Extension mode is implemented with the palette mapped to the top 64 entries of the Next’s Enhanced ULA palette
  • Speed doubled to 28MHz from 14MHz
    The display pipeline now samples important display related settings at the start of a pixel’s generation
  • Layer 2 and the shadow buffer can now point at any page in memory. There is no longer any restriction to the first 512k sram.
    Port $123B is changed somewhat: MM00SREW
    E = 1 to enable layer 2 display
    W = 1 to enable write only mapping of layer 2 memory over the bottom 16k
    R = 1 to enable read ony mapping of layer 2 memory over the bottom 16k
    S = 1 to map the shadow layer 2 memory instead of the active layer 2 memory
    MM = 00 to map the first 16k of layer 2 over the bottom 16k
    01 to map the second 16k of layer 2 over the bottom 16k
    10 to map the last 16k of layer 2 over the bottom 16k
    11 to map all 48k of layer 2 over the bottom 48k of memory
    Slow down is no longer applied so that the CPU and DMA can run at the 14MHz rate all the time.
  • New 4-bit mode introduced similar to Radastan on the ZX UNO
    Internal Speaker/Beeper
    When enabled, all next audio is now routed to the internal speaker as a trial
  • a second UART mapped to the Pi GPIO is implemented for communication with the Pi PI GPIO
    All 28 PI GPIO pins are programmable with output enables, outputs and can be read via NEXTREG
    Special functions can be overlaid: PWM audio, UART, SPI and I2C. when overlaid, the GPIO function of affected pins is suspended.
    PWM audio from the Pi can be directed to the internal next audio stream or to tape i/o.
  • When enabled, the CPU is slowed to 3.5MHz and a set of peripheral enables is activated internally
    The peripheral Enables selectively disable internal next peripherals to allow external peripherals with port conflicts to be attached.
    KNOWN ISSUES / NOTES (Do not report these)
    Hard reset (F1, Long press of Reset button, M1+1) is not working. Power off the machine instead.
    Machine timing has not been refined. Contention, floating bus etc is implemented but the timing of the video frame is not entered properly yet. This means programs expecting exact timing may not display properly.
    The NMI buttons to MF and divMMC are not connected. The MF menu and esxDOS NMI menus are not accessible.
    Some extended ULA recoloured programs, are not coloured correctly.
WARNING: Users willing to test, should do that at their own risk knowing there’s a minute chance they may brick their machines. This can only be remedied with a Xilinx platform cable (available on eBay) and should only be practiced by experienced users. If you DO choose to test, please report all findings in the issues section in the gitlab repository (see link above). Please do NOT post notes in the forum or Facebook. It’s impossible to track them all without a proper Issue Tracking mechanism that gitlab does provide. THANK YOU!
ZXorDIE NextBuild ZXBD Snapshot uploader ZXBasic Online Database

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