DivMMC in the development version

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azesmbog
Posts: 16
Joined: Mon May 29, 2017 9:12 pm

Re: DivMMC in the development version

Postby azesmbog » Thu Mar 25, 2021 10:48 am

slingshot wrote:
Wed Mar 24, 2021 4:36 pm
I'm finished with porting the patches to T80n:
Good job!!!
I had / became:
Image

It remains to correct the 055 test :)
The first two are not very important)

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Thu Mar 25, 2021 11:42 am

Yeah, CCF and SCF XY flags modifications are complicated, and it's not even consistent between Z80 vendors, don't worth the effort to pursue any fix for them.

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Thu Mar 25, 2021 3:09 pm

On MiST, 4,17,22,26,33 fail for the 128k tests (by a small margin only, difference in R is 1 or 2 only). Maybe the interrupt length is good, but the position must be adjusted. I wonder about the results on the real grey +2.

Alcoholics Anonymous
Posts: 781
Joined: Mon May 29, 2017 7:00 pm

Re: DivMMC in the development version

Postby Alcoholics Anonymous » Thu Mar 25, 2021 3:28 pm

slingshot wrote:
Wed Mar 24, 2021 8:00 pm
When it'll done, I'll consider using the module. However it still uses a Xilinx specific module, isn't it considered to use generic ones? Not just here, but at other places, too.
Maybe when the hardware is considered completed. Most of the rams are made with the xilinx core generator so that I could control exactly the characteristics of the rams. Earlier in the project, generic instantiations were sometimes being inferred into bram blocks rather than lut ram. Although the synthesis may have ultimately put that stuff in lut ram as bram was used up, I wanted it in lut ram from the beginning to make sure the design worked properly as intended.

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Thu Mar 25, 2021 7:35 pm

Alcoholics Anonymous wrote:
Thu Mar 25, 2021 3:28 pm
Maybe when the hardware is considered completed. Most of the rams are made with the xilinx core generator so that I could control exactly the characteristics of the rams. Earlier in the project, generic instantiations were sometimes being inferred into bram blocks rather than lut ram. Although the synthesis may have ultimately put that stuff in lut ram as bram was used up, I wanted it in lut ram from the beginning to make sure the design worked properly as intended.
I'm not sure if some preprocessor-like macros are available, e.g. if XILINX generate..(Xilinx stuff).else generate...(Altera stuff)

Alcoholics Anonymous
Posts: 781
Joined: Mon May 29, 2017 7:00 pm

Re: DivMMC in the development version

Postby Alcoholics Anonymous » Mon Mar 29, 2021 12:15 am

I suppose we could add a generic constant to act as flag at the top level.

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Tue Mar 30, 2021 1:46 pm

Yeah, just generics must propagate from the top to the bottom. I hope there's something which is similar to `ifdef in Verilog.

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Wed Apr 21, 2021 12:13 pm

One issue I've encountered (well, not just me) with the MMC handling:
The timeouts in the loader are too tight, and it can result in various errors at boot (like "error opening TBBlue.FW file"). Or the configuration selected in the video test screen cannot be saved (it's the NextOS already, not the boot loader). When the Next OS booted, there are no more issues.
Is it possible to increase the timeouts at the early phase? Or it might be a totally different problem?

Alcoholics Anonymous
Posts: 781
Joined: Mon May 29, 2017 7:00 pm

Re: DivMMC in the development version

Postby Alcoholics Anonymous » Wed Apr 21, 2021 2:47 pm

Maybe. Is this with directly connected sd cards or with vhd?
At some point we sped up the boot program to 28MHz and it's possible the timeouts didn't get increased.

slingshot
Posts: 40
Joined: Mon Mar 22, 2021 12:21 pm

Re: DivMMC in the development version

Postby slingshot » Wed Apr 21, 2021 8:56 pm

Alcoholics Anonymous wrote:
Wed Apr 21, 2021 2:47 pm
Maybe. Is this with directly connected sd cards or with vhd?
At some point we sped up the boot program to 28MHz and it's possible the timeouts didn't get increased.
It's with VHD. MiST doesn't have direct-connected SD Card. One reason is that the ARM CPU didn't finish its job after core loading (like activating USB devices, etc...), but sometimes it happens even everything already settled down.


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